b685c4f31f1f27ca2f6043e25d0693b9

Микросхема SN74ABT574ADW SO20

Поставка электронных компонентов в Смоленск

77,42 руб.

x 77,42 = 77,42
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Склад №110-12 дней77,42руб.72,00руб.69,68руб.68,13руб.63,48руб.61,94руб.60,39руб.55,74руб.
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Склад №25-7 дней140,13руб.128,52руб.126,19руб.123,10руб.114,58руб.112,26руб.109,16руб.98,32руб.
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Склад №35 дней181,16руб.167,23руб.163,36руб.159,49руб.148,65руб.144,78руб.141,68руб.126,97руб.
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Склад №47-10 дней92,90руб.85,16руб.83,61руб.81,29руб.75,87руб.74,32руб.72,00руб.65,03руб.
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Склад №55 дней178,84руб.164,90руб.161,03руб.157,16руб.152,52руб.147,10руб.139,36руб.125,42руб.

Характеристики

SN74ABT574ADW SO20The SN74ABT574ADW is an octal edge-triggered D-type Flip-flop with 3-state outputs. It is designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. On the positive transition of the clock input, the Q outputs are set to the logic levels set up at the data (D) inputs. A buffered OE input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pull-up components. OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

• Ioff Supports partial-power-down mode operation
• Latch-up performance exceeds 500mA per JEDEC Standard JESD 17
• Green product and no Sb/Br