Микросхема MX25U12873FM2I-10G 1.8V 128M-BIT [x1/x2/x4] CMOS MXSMIO® FLASH MEMORY

Характеристики

MX25U12873FM2I-10GMX25U12873FM2I-10G 1.8V 128M-BIT [x1/x2/x4] CMOS MXSMIO® FLASH MEMORY

MX25U12873F is 128Mb bits Serial NOR Flash memory, which is configured as 16,777,216 x 8 internally. When it

is in two or four I/O mode, the structure becomes 67,108,864 bits x 2 or 33,554,432 bits x 4.

MX25U12873F features a serial peripheral interface and software protocol allowing operation on a simple 3-wire

bus while it is in single I/O mode. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial

data output (SO). Serial access to the device is enabled by CS# input.

When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input

and data output. When it is in four I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin, and

SIO2 pin and SIO3 pin are also enabled for address/dummy bits input and data output.

The MX25U12873F MXSMIO®

(Serial Multi I/O) provides sequential read operation on the whole chip.

After program/erase command is issued, auto program/erase algorithms which program/erase and verify the specified

page or sector/block locations will be executed. Program command is executed on byte basis, or page (256

bytes) basis, or word basis. Erase command is executed on 4K-byte sector, 32K-byte block, or 64K-byte block, or

whole chip basis.

To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read

command can be issued to detect completion status of a program or erase operation via WIP bit.

Advanced security features enhance the protection and security functions, please refer to security features section

for more details.

The MX25U12873F utilizes Macronix’s proprietary memory cell, which reliably stores memory contents even after

100,000 program and erase cycles.